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d a t a sh eet product speci?cation supersedes data of 1997 jun 19 file under discrete semiconductors, sc13b 1997 oct 22 discrete semiconductors phc20512 complementary enhancement mode mos transistors
1997 oct 22 2 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 features high-speed switching no secondary breakdown very low on-state resistance. applications motor and actuator driver power management synchronized rectification. description one n-channel and one p-channel enhancement mode mos transistor in an 8-pin plastic sot96-1 (so8) package. caution the device is supplied in an antistatic package. the gate-source input must be protected against static discharge during transport or handling. pinning - sot96-1 (so8) pin symbol description 1s 1 source 1 2g 1 gate 1 3s 2 source 2 4g 2 gate 2 5d 2 drain 2 6d 2 drain 2 7d 1 drain 1 8d 1 drain 1 fig.1 simplified outline and symbol. handbook, halfpage 1 mam118 1 4 5 8 d 1 d 2 d 2 d 2 g 2 s 1 g 1 s quick reference data symbol parameter conditions min. max. unit per channel v ds drain-source voltage (dc) n-channel - 30 v p-channel -- 30 v v sd source-drain diode forward voltage n-channel i s = 1.25 a - 1v p-channel i s = - 1.25 a -- 1.3 v v gs gate-source voltage (dc) - 20 v v gsth gate-source threshold voltage n-channel v ds =v gs; i d = 1 ma 1 2.8 v p-channel v ds =v gs ; i d = - 1ma - 1 - 2.8 v i d drain current (dc) t s =80 c n-channel - 6.4 a p-channel -- 4a r dson drain-source on-state resistance n-channel v gs =10v; i d = 3.2 a - 0.05 w p-channel v gs = - 10 v i d = - 2a - 0.12 w p tot total power dissipation t s =80 c - 3.5 w
1997 oct 22 3 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 limiting values in accordance with the absolute maximum rating system (iec 134). notes 1. t s is the temperature at the soldering point of the drain lead. 2. pulse width and duty cycle limited by maximum junction temperature. 3. maximum permissible dissipation per mos transistor. both devices may be loaded up to 3.5 w at the same time. 4. maximum permissible dissipation per mos transistor. device mounted on printed-circuit board with an r th a-tp (ambient to tie-point) of 27.5 k/w. 5. maximum permissible dissipation per mos transistor. device mounted on printed-circuit board with an r th a-tp (ambient to tie-point) of 90 k/w. 6. maximum permissible dissipation if only one mos transistor dissipates. device mounted on printed-circuit board with an r th a-tp (ambient to tie-point) of 90 k/w. symbol parameter conditions min. max. unit per channel v ds drain-source voltage (dc) n-channel - 30 v p-channel -- 30 v v gs gate-source voltage (dc) - 20 v i d drain current (dc) t s =80 c; note 1 n-channel - 6.4 a p-channel -- 4a i dm peak drain current note 2 n-channel - 25 a p-channel -- 16 a p tot total power dissipation t s =80 c; note 3 - 3.5 w t amb =25 c; note 4 - 2.6 w t amb =25 c; note 5 - 1.1 w t amb =25 c; note 6 - 1.5 w t stg storage temperature - 65 +150 c t j operating junction temperature - 65 +150 c source-drain diode i s source current (dc) t s =80 c n-channel - 3.5 a p-channel -- 2.6 a i sm peak pulsed source current note 2 n-channel - 14 a p-channel -- 10 a
1997 oct 22 4 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.2 power derating curve. handbook, halfpage 0 50 100 150 mgg340 8 6 2 0 4 p tot (w) t s ( c) d = 0.01; t s =80 c. (1) r dson limitation. fig.3 soar; n-channel. handbook, halfpage 10 2 1 10 10 - 1 mgg341 10 - 1 11010 2 v ds (v) i d (a) 10 m s 1 ms dc 100 ms 10 ms 100 m s (1) t p = t p t p t p t t d = fig.4 soar; p-channel. d = 0.01; t s =80 c. (1) r dson limitation. handbook, halfpage - 10 2 - 1 - 10 - 10 - 1 mbh587 - 10 - 1 - 1 - 10 - 10 2 v ds (v) i d (a) 10 m s 1 ms dc 100 ms 10 ms 100 m s (1) t p = t p t p t p t t d =
1997 oct 22 5 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 thermal characteristics characteristics t j =25 c unless otherwise speci?ed. symbol parameter value unit r th j-s thermal resistance from junction to soldering point 20 k/w symbol parameter conditions min. typ. max. unit per channel v (br)dss drain-source breakdown voltage n-channel v gs = 0; i d =10 m a30 -- v p-channel v gs = 0; i d = - 10 m a - 30 -- v v gsth gate-source threshold voltage n-channel v gs =v ds ; i d = 1 ma 1 - 2.8 v p-channel v gs =v ds ; i d = - 1ma - 1 -- 2.8 v i dss drain-source leakage current n-channel v gs = 0; v ds =24v -- 100 na p-channel v gs = 0; v ds = - 24 v --- 100 na i gss gate leakage current v gs = 20 v; v ds =0 n-channel -- 100 na p-channel -- 100 na r dson drain-source on-state resistance n-channel v gs = 4.5 v; i d = 1.6 a -- 0.1 w v gs = 10 v; i d = 3.2 a -- 0.05 w p-channel v gs = - 4.5 v; i d = - 1a -- 0.25 w v gs = - 10 v; i d = - 2a -- 0.12 w c iss input capacitance n-channel v gs = 0; v ds =24v; f=1mhz - 450 - pf p-channel v gs = 0; v ds = - 24 v; f = 1 mhz - 450 - pf c oss output capacitance n-channel v gs = 0; v ds =24v; f=1mhz - 200 - pf p-channel v gs = 0; v ds = - 24 v; f = 1 mhz - 200 - pf c rss reverse transfer capacitance n-channel v gs = 0; v ds =24v; f=1mhz - 100 - pf p-channel v gs = 0; v ds = - 24 v; f = 1 mhz - 100 - pf q g total gate charge n-channel v gs = 10 v; v dd = 15 v; i d = 3.2 a - 15 - nc p-channel v gs = - 10 v; v dd = - 15 v; i d = - 2a - 13 - nc q gs gate-source charge n-channel v gs = 10 v; v dd = 15 v; i d = 3.2 a - 1 - nc p-channel v gs = - 10 v; v dd = - 15 v; i d = - 2a - 1 - nc
1997 oct 22 6 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 q gd gate-drain charge n-channel v gs = 10 v; v dd = 15 v; i d = 3.2 a - 5 - nc p-channel v gs = - 10 v; v dd = - 15 v; i d = - 2a - 4 - nc t d(on) turn-on delay time n-channel v gs = 0to10v; v dd =15v; i d =1a; r gen =6 w - 7 - ns p-channel v gs =0to - 10 v; v dd = - 15 v; i d = - 1 a; r gen =6 w - 6 - ns t d(off) turn-off delay time n-channel v gs =10to0v; v dd =15v; i d = 1 a; r gen =6 w - 20 - ns p-channel v gs = - 10 to 0 v; v dd = - 15 v; i d = - 1 a; r gen =6 w - 29 - ns t f fall time n-channel v gs = 0to10v; v dd =15v; i d =1a; r gen =6 w - 8 - ns p-channel v gs = - 10 to 0 v; v dd = - 15 v; i d = - 1 a; r gen =6 w - 16 - ns t r rise time n-channel v gs =10to0v; v dd =15v; i d =1a; r gen =6 w - 12 - ns p-channel v gs =0to - 10 v; v dd = - 15 v; i d = - 1 a; r gen =6 w - 4 - ns t on turn-on switching time n-channel v gs = 0to10v; v dd =15v; i d =1a; r gen =6 w - 15 - ns p-channel v gs =0to - 10 v; v dd = - 15 v; i d = - 1 a; r gen =6 w - 10 - ns t off turn-off switching time n-channel v gs =10to0v; v dd =15v; i d = 1 a; r gen =6 w - 32 - ns p-channel v gs = - 10 to 0 v; v dd = - 15 v; i d = - 1 a; r gen =6 w - 45 - ns source-drain diode v sd source-drain diode forward voltage n-channel v gd = 0; i s = 1.25 a -- 1v p-channel v gd = 0; i s = - 1.25 a --- 1.3 v t rr reverse recovery time n-channel i s = 1.25 a; di/dt = - 100 a/ m s - 45 - ns p-channel i s = - 1.25 a; di/dt = 100 a/ m s - 75 - ns symbol parameter conditions min. typ. max. unit
1997 oct 22 7 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.5 switching times test circuit with input and output waveforms; n-channel. h andbook, full pagewidth mam274 90 % 10 % 10 % 90 % v in v out t d(on) t on t off t f t r t d(off) 0 0 v dd r l v out v in fig.6 switching times test circuit with input and output waveforms; p-channel. handbook, full pagewidth mgd391 10 % 90 % v in v out t d(on) t on t off t r t f t d(off) 10 % 90 % 10 % 90 % 0 0 - v dd r l v out v in
1997 oct 22 8 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.7 transient thermal resistance from junction to soldering point as a function of pulse time for n- and p-channels; typical values. handbook, full pagewidth 10 2 10 1 10 - 1 10 - 6 10 - 5 10 - 4 10 - 3 10 - 2 10 - 1 1 mgg342 r th js (k/w) t p (s) (1) (2) (3) (4) (5) (6) (7) (8) (9) t p t p t p t t d = (1) d = 0.75. (2) d = 0.5. (3) d = 0.33. (4) d = 0.2. (5) d = 0.1. (6) d = 0.05. (7) d = 0.02. (8) d = 0.01. (9) d =0.
1997 oct 22 9 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.8 capacitance as a function of drain-source voltage; n-channel typical values. handbook, halfpage 0 4 8 12 16 20 1250 0 1000 750 500 250 mgg343 c (pf) v ds (v) (1) (2) (3) v gs = 0; f = 1 mhz; t j =25 c. (1) c iss . (2) c oss . (3) c rss . fig.9 capacitance as a function of drain source voltage; p-channel typical values. handbook, halfpage 0 - 4 - 8 - 12 - 16 - 20 1250 0 1000 750 500 250 mgg352 c (pf) v ds (v) (1) (2) (3) v gs = 0; f = 1 mhz; t j =25 c. (1) c iss . (2) c oss . (3) c rss . fig.10 output characteristics; n-channel typical values. handbook, halfpage 04812 0 30 20 10 mgg344 i d (a) v ds (v) (4) (5) (6) (1) (2) (3) t amb =25 c; t p =80 m s; d =0. (1) v gs =10v. (2) v gs =5v. (3) v gs = 4.5 v. (4) v gs =4v. (5) v gs = 3.5 v. (6) v gs =3v. fig.11 output characteristics; p-channel typical values. handbook, halfpage 0 - 4 - 8 - 12 0 - 16 - 12 - 8 - 4 mgg353 i d (a) v ds (v) (4) (5) (6) (1) (2) (3) t amb =25 c; t p =80 m s; d =0. (1) v gs = - 10 v. (2) v gs = - 5v. (3) v gs = - 4.5 v. (4) v gs = - 4v. (5) v gs = - 3.5 v. (6) v gs = - 3v.
1997 oct 22 10 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.12 transfer characteristic; n-channel typical values. v ds = 10 v; t amb =25 c; t p =80 m s; d =0. handbook, halfpage 0246 mgg345 20 30 0 10 v gs (v) i d (a) v ds = - 10 v; t amb =25 c; t p =80 m s; d =0. handbook, halfpage 0 - 2 - 4 - 6 mgg354 - 8 - 16 - 12 0 - 4 v gs (v) i d (a) fig.13 transfer characteristic; p-channel typical values. fig.14 gate-source voltage and drain-source voltage as a function of total gate charge; n-channel typical values. handbook, halfpage 04 16 16 12 4 0 8 812 mgg346 (1) (2) v (v) q g (nc) v dd = 12.5 v; i d = 3.2 a; t amb =25 c. (1) v ds . (2) v gs. fig.15 gate-source voltage and drain-source voltage as a function of total gate charge; p-channel typical values. handbook, halfpage 04 16 - 16 - 12 - 4 0 - 8 812 mgg355 (1) (2) v ds , v gs (v) q g (nc) v dd = - 12.5 v; i d = - 2 a; t amb =25 c. (1) v ds . (2) v gs.
1997 oct 22 11 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.16 source current as a function of source-drain diode forward voltage; n-channel typical values. v gd =0. (1) t amb = 150 c; t p = 300 m s; d =0. (2) t amb =25 c; t p = 300 m s; d =0. (3) t amb = - 65 c; t p = 300 m s; d =0. handbook, halfpage 0 0.4 0.8 1.2 0 16 12 8 4 mgg347 i s (a) v sd (v) (1) (2) (3) fig.17 source current as a function of source-drain diode forward voltage; p-channel typical values. v gd =0. (1) t amb = 150 c; t p = 300 m s; d =0. (2) t amb =25 c; t p = 300 m s; d =0. (3) t amb = - 65 c; t p = 300 m s; d =0. handbook, halfpage 0 - 0.4 - 0.8 - 1.2 0 - 10 - 8 - 6 - 2 - 4 mgg356 i s (a) v sd (v) (1) (2) (3)
1997 oct 22 12 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 handbook, halfpage 10 0 2468 10 3 10 2 10 mgg348 r dson (m w ) v gs (v) (1) (2) (3) (4) (5) fig.18 drain-source on-state resistance as a function of gate-source voltage; n-channel typical values. v ds 3 i d r dson ; t amb =25 c; t p = 300 m s; d =0. (1) i d = 0.5 a. (2) i d = 1.6 a. (3) i d = 3.2 a. (4) i d = 6.4 a. (5) i d =10a. fig.19 drain-source on-state resistance as a function of gate-source voltage; p-channel typical values. v ds 3 i d r dson ; t amb =25 c; t p = 300 m s; d =0. (1) i d = 0.1 a. (2) i d = 0.5 a. (3) i d =1a. (4) i d =2a. (5) i d =4a. (6) i d =8a. handbook, halfpage - 10 0 - 2 - 4 - 6 - 8 10 3 10 2 10 mgg357 r dson (m w ) v gs (v) (1) (2) (3) (4) (5) (6)
1997 oct 22 13 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.20 temperature coefficient of gate-source threshold voltage as a function of junction temperature; n-channel typical values. v gsth at v ds =v gs ; i d = 1 ma. k v gsth at t j v gsth at 25 c -------------------------------------- = handbook, halfpage - 100 1.3 1.1 0.9 0.7 1.2 1 0.8 - 50 150 0 50 100 mgg349 t j ( c) k fig.21 temperature coefficient of gate-source threshold voltage as function of junction temperature; p-channel typical values. v gsth at v ds =v gs ; i d = - 1 ma. k v gsth at t j v gsth at 25 c -------------------------------------- = handbook, halfpage - 100 1.3 1.1 0.9 0.7 1.2 1 0.8 - 50 150 0 50 100 mgg358 t j ( c) k
1997 oct 22 14 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 fig.22 temperature coefficient of drain-source on-resistance as a function of junction temperature; n-channel typical values. (1) r dson at v gs = 10 v; i d = 3.2 a. (2) r dson at v gs = 4.5 v; i d = 1.6 a. k r dson at t j r dson at 25 c ----------------------------------------- = handbook, halfpage - 100 2 1.5 0 1 0.5 - 50 150 0 (1) (2) 50 100 mgg359 t j ( c) k fig.23 temperature coefficient of drain-source on-resistance as a function of junction temperature; p-channel typical values. (1) r dson at v gs = - 10 v; i d = - 2a. (2) r dson at v gs = - 4.5 v; i d = - 1a. k r dson at t j r dson at 25 c ----------------------------------------- = handbook, halfpage - 100 2 1.5 0 1 0.5 - 50 150 0 (1) (2) 50 100 mgg359 t j ( c) k
1997 oct 22 15 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 package outline unit a max. a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 0.25 dimensions (inch dimensions are derived from the original mm dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 1.0 0.4 sot96-1 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 4 5 pin 1 index 1 8 y 076e03s ms-012aa 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.20 0.19 0.16 0.15 0.050 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.01 0.041 0.004 0.039 0.016 0 2.5 5 mm scale so8: plastic small outline package; 8 leads; body width 3.9 mm sot96-1 95-02-04 97-05-22
1997 oct 22 16 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
1997 oct 22 17 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 notes
1997 oct 22 18 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 notes
1997 oct 22 19 philips semiconductors product speci?cation complementary enhancement mode mos transistors phc20512 notes
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